Gallium Purity Grades: 4N to 9N - Specifications, Measurement, and Applications

Gallium Purity Grades at a Glance

What Does the Gallium Purity Grade Notation Mean?

The "N" notation counts consecutive nines in the purity percentage. 4N = 99.99% (four nines), 5N = 99.999% (five nines), 6N = 99.9999% (six nines). Half-grade designations like "4N5" or "6N5" represent intermediate purity: 4N5 = 99.995%, 6N5 = 99.99995%. Each full grade step reduces total allowable impurities by 10x - from 100 ppm at 4N to 10 ppm at 5N to 1 ppm at 6N to 0.1 ppm (100 ppb) at 7N.

The notation is industry-wide and appears consistently across supplier datasheets from Aster Materials, Goodfellow, American Elements, Western Minmetals, and 5N Plus without a single formally published ISO or ASTM standard mandating it. It functions as a de facto standard adopted across the semiconductor materials industry. The Argus Media pricing assessments - the primary price reference for gallium - use the 4N and 6N designations directly in their published assessment methodology.

Purity specifications appear in two forms. Total impurities set a ceiling on the combined concentration of all elements other than gallium. Element-specific limits set individual maximums for the impurities that cause the most damage in the target application. A gallium batch can pass a total impurity check but fail an element-specific check if one damaging impurity (silicon, copper, or iron) sits at its individual maximum while others are near zero. Both figures appear on a Certificate of Analysis (COA); both must be checked for compound semiconductor applications.

What Are the Specific Impurity Limits at Each Gallium Grade?

Impurity limits tighten by roughly 10x at each grade step, with the most damage-causing elements (silicon, copper, iron) held to proportionally stricter limits than bulk impurities like zinc or tin.

4N (99.99%) - General industrial grade: Total impurities ≤100 ppm. Individual critical elements (Cu, Fe, Pb, As) typically below 5 ppm each. Use case: low-end compound semiconductor feedstock, further purification input.

5N (99.999%) - Standard compound semiconductor grade:

6N (99.9999%) - Optoelectronic grade (the compound semiconductor production standard):

7N (99.99999%) - MBE grade:

For IC-grade GaAs wafer production using 7N gallium, the combined feedstock specification requires total impurities in both gallium and arsenic below 100 µg/kg (0.1 ppm), with lead, mercury, and zinc below 5 µg/kg each, and copper, iron, silicon, and other critical donors below 1 µg/kg each.

Why Do Specific Impurities Damage Gallium Arsenide Semiconductor Performance?

Each impurity element in gallium creates a specific electronic defect in GaAs crystals. The same concentration of silicon and iron produces completely different failure modes, which is why the 6N specification sets a stricter limit on silicon (≤0.2 ppm) than on some other elements. Three impurities - silicon, iron, and copper - drive most of the purity requirement in GaAs compound semiconductor production.

Silicon in GaAs acts as a shallow donor impurity when it substitutes for a gallium atom in the crystal lattice. Silicon's binding energy in GaAs is approximately 6 meV - low enough that silicon atoms ionize completely at room temperature, each releasing one electron into the conduction band. For semi-insulating (SI) GaAs - where the Fermi level must be pinned near mid-gap - even 10¹³ cm⁻³ silicon donors overwhelm the EL2 trap compensation mechanism and convert the material from semi-insulating to n-type, destroying its function as a substrate for microwave ICs. This is why 7N gallium (Si below 1 ppb) is the minimum grade for IC-grade SI GaAs.

Iron in GaAs creates deep electron traps at approximately 0.52 eV below the conduction band. These traps capture minority carriers and prevent them from recombining radiatively - the process that produces light in LED and laser diode structures. Iron-contaminated GaAs has a short minority carrier lifetime and low optical efficiency. Iron is one of the hardest impurities to remove from gallium because its zone refining segregation coefficient is unfavorable, requiring many refining passes or chemical treatment steps.

Copper in GaAs forms deep acceptor traps that capture charge carriers, reducing device efficiency. Copper is particularly damaging in high-frequency transistors where it introduces 1/f noise. In optoelectronic devices, copper traps reduce LED wall-plug efficiency and accelerate degradation under operating current.

Carbon in semi-insulating GaAs plays a dual role. Carbon forms acceptor levels that compensate EL2 donor defects - the combination of EL2 donors and carbon acceptors pins the Fermi level near mid-gap, producing SI behavior. Too much carbon degrades uniformity after silicon implantation (used in IC fabrication). Achieving the right carbon balance requires precise control of the gallium feedstock composition, which is only possible with 6N-7N base purity.

What Is the EL2 Defect and How Does Gallium Purity Control It?

EL2 is a native defect in GaAs where an arsenic atom sits on a gallium lattice site (the "arsenic anti-site" complex, As_Ga). It is a donor-like trap located approximately 0.75 eV below the conduction band, thermally stable to 900°C, and present at concentrations of 10¹⁴ to 10¹⁵ cm⁻³ in unintentionally doped GaAs grown from a slightly arsenic-rich melt. EL2 is the mechanism that makes undoped GaAs semi-insulating: EL2 traps compensate residual acceptors (carbon, zinc), pinning the Fermi level near mid-gap and producing resistivities above 10⁷ Ω·cm.

Gallium feedstock purity determines whether EL2 compensation succeeds or fails. The argument is quantitative:

This arithmetic sets the 7N boundary for IC-grade semi-insulating GaAs. Below 7N feedstock purity, residual silicon donor concentrations in the grown crystal are too high for reliable SI behavior regardless of EL2 content. Above 7N, silicon is no longer the limiting factor and other considerations (crystal growth conditions, arsenic stoichiometry) dominate.

How Is Gallium Purity Measured and Certified?

Gallium purity is verified by 4 analytical techniques, each with different detection limits and sample requirements. GDMS is the primary method for bulk metal certification at 6N and above. ICP-MS supplements GDMS for liquid-phase analysis. SIMS characterizes impurity profiles in finished wafers rather than bulk metal.

GDMS (Glow Discharge Mass Spectrometry) is the reference technique for high-purity metal certification. A focused primary ion beam sputters material from the sample surface; ejected secondary ions are separated by mass and counted. GDMS requires no sample digestion, preventing contamination during preparation - critical at 7N purity levels where sample handling introduces more error than the measurement itself.

GDMS can verify 7N gallium specifications (total impurities <50 ppb, individual elements <5 ppb) routinely. For 8N and 9N verification, specialized high-resolution GDMS systems at facilities such as the National Research Council Canada (NRC) and EAG Laboratories push detection limits to sub-ppb and sub-ppt levels.

ICP-MS (Inductively Coupled Plasma Mass Spectrometry) achieves parts-per-trillion detection limits in solution but requires dissolving the gallium sample first. The dissolution step risks contamination from reagents, containers, and the laboratory environment - problematic at 7N+ purity. ICP-MS supplements GDMS for specific elements where its detection limits exceed GDMS, and is the standard method for gallium analysis in ore, slag, and process streams at lower purity levels.

ICP-OES (Inductively Coupled Plasma Optical Emission Spectrometry) operates at ppb to low ppm sensitivity, adequate for 4N-5N verification but insufficient for 6N+ certification. ICP-OES is faster and cheaper than ICP-MS and serves as the standard bulk analysis method for lower-grade gallium and gallium content in bauxite.

SIMS (Secondary Ion Mass Spectrometry) depth-profiles impurity distributions from the surface of finished GaAs or GaN wafers. SIMS is not used to certify incoming gallium metal purity - it characterizes grown crystalline material to verify that impurities from the gallium feedstock did not incorporate into the device layers.

Third-party certification for commercial gallium shipments is provided by EAG Laboratories (GDMS specialists), Northern Analytical Laboratory, and NRC Canada. Major TIC firms SGS, Bureau Veritas, and Intertek handle gallium analysis within broader specialty metals programs. All certificates operate under ISO/IEC 17025 laboratory accreditation.

A gallium COA must include: lot/batch number, CAS number (7440-55-3), purity percentage, concentration of each measured impurity element in ppm or ppb, analytical method used, detection limits, reference to traceability standards (NIST or equivalent), issue date, and authorized QA signature.

Which Applications Require Which Gallium Grade?

Grade selection is driven by the most sensitive failure mode in the target device. An application that tolerates 1 ppm silicon (LED) requires only 5N feedstock. An application where 1 ppm silicon destroys functionality (semi-insulating GaAs substrate) requires 7N. The progression from 5N to 7N is not a quality preference - it is a functional requirement.

How Many Refining Passes Does Zone Refining Take to Reach Each Grade?

Zone refining requires approximately 50 passes of the molten zone to advance gallium from 4N to 7N purity. Each pass moves impurities preferentially toward one end of the ingot as the molten zone sweeps through - impurities that preferentially dissolve in liquid concentrate in the molten zone and migrate with it.

A published study on continuous partial recrystallization of gallium documented 7N (≥99.99999%) achievement starting from 5N2 (99.9992%) feedstock after 50 directional freezing passes at 20-35 rpm rotation. The purity jump from 5N to 7N - two grade steps covering a 100x reduction in impurities - required the full 50-pass cycle. Going from 4N to 5N (10x reduction) requires far fewer passes, reflecting the asymptotic difficulty curve: each successive grade step requires disproportionately more processing effort than the previous one.

Reason for increasing difficulty: Zone refining works by exploiting the difference in how impurities distribute between solid and liquid gallium (the segregation coefficient). As purity increases, the concentration gradient driving impurity migration decreases. Segregation coefficients also become less favorable as the impurity matrix thins out. Purification steps that achieve dramatic improvement at 4N produce diminishing returns at 7N.

How Is Purity Priced Across Gallium Grades?

Gallium grade pricing follows an exponential premium structure above the 4N commodity baseline. Argus Media publishes the primary market assessments for both 4N and 6N gallium - the two grades most actively traded - expressed as ex-works China (CNY/kg) and FOB pricing (USD/kg). Grades above 6N are transacted through direct negotiation between specialized suppliers and industrial buyers; no published spot assessment exists for 7N, 8N, or 9N.

The 6N to 4N ratio of 2x-3x reflects the additional zone refining, chemical treatment, and contamination-controlled processing required. The 7N to 4N ratio of 5x-10x reflects the exponentially harder final purification stages plus the ultra-clean-room handling required to prevent recontamination. At 7N, contamination from container surfaces, atmospheric particles, and handling tools becomes the primary quality control challenge - not the refining process itself.

Defense and aerospace programs pay 7N premiums routinely because the cost of contaminated wafers - lost production, rescheduled satellite programs, failed radar modules - far exceeds the gallium input cost differential. Commercial LED fabs tolerate 5N because LED chip yield losses from trace impurities are statistically manageable within commercial margins. See the current gallium price page for live 4N spot pricing and the price history page for how the 4N/6N premium spread has evolved during China's export restriction period since 2023.

Are Purity Requirements Getting Stricter as Semiconductor Geometries Shrink?

Yes - device feature size reduction makes purity requirements stricter because smaller devices incorporate fewer atoms in each functional region, so a single impurity atom at the wrong position has a larger relative impact on device behavior. At 2nm gate lengths, a handful of silicon atoms in the wrong location can shift a transistor's threshold voltage enough to cause functional failure. The same silicon concentration that is acceptable in a 100nm device becomes unacceptable in a 5nm device.

For gallium-based compound semiconductors specifically: GaN power devices moving to 650V and 1200V ratings require ultra-low trap densities in the drift region - meaning iron and carbon contamination levels that were tolerable in older designs cause leakage and breakdown anomalies in advanced-geometry devices. GaN-on-SiC devices for 6G base station power amplifiers and AI data center power conversion increasingly specify 7N gallium feedstock for MOCVD growth, a grade previously reserved for MBE and space applications.

The emerging Ga₂O₃ (gallium oxide) substrate sector is establishing its own purity specifications as the first commercial devices approach production. Current commercial Ga₂O₃ powder for semiconductor substrates is sold at 4N-5N purity, but device researchers target purity equivalent to 6N GaAs-grade feedstock. As Ga₂O₃ devices move from research to commercial production between 2027 and 2030, their specification requirements will likely converge toward the 6N-7N gallium standards already established for GaAs.

The physical connection between gallium metal purity and device performance is covered for specific applications on the compound semiconductors page, the LED applications page, and the aerospace applications page.

Gallium Purity Grades: Quick Reference